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MOSIS Annoucements
MOSIS, CMP, and CMC Partner to Introduce a 3D-IC Process
MOSIS, CMP and CMC are partnering to offer a 3D-IC Multi-Project Wafer
(MPW) service based on Tezzaron Semiconductor's SuperContact
technology and GLOBALFOUNDRIES' 130 nm CMOS process.
The first MPW run is targeting January 2011
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2-tier face-to-face bonded wafers
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130 nm CMOS process for both tiers
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Top tier exposing TSV and backside metal pads for wire bonding
A design-kit supporting 3D-IC design with standard-cells and IO
libraries is available.
Further MPW runs schedule supporting process flavors (multiple tiers
beyond 2, different CMOS flavors for different tiers) will be driven
by users' requirements.
Potential users are encouraged to contact MOSIS for details through
the MOSIS Customer
Support System.
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Calendar of Events
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Related Links
IBM Processes
IBM CMOS Access
Request.
Fabrication Schedule
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