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Digital Design Flow

Synthesis to place and route (with verification) design flows are available as listed below.

ARM (was Artisan)
ARM (was Artisan) offers free digital standard cell libraries, I/Os (pads), and memory generators to commercial firms for the IBM 90 nm (9LP/RF, IBM 0.13 micron (8RF-DM, 8RF-LM), and IBM 0.18 micron (7RF) processes; the TSMC 0.13 micron (CL013G and CR013G/CM013G). 0.18 micron (CL018 and CR018/CM018), and 0.25 micron (CL025 and CR025/CM025) processes.

For more information from ARM, see Universities can access the complete front-end views of core, I/O cells, and memory generators (behavioral, synthesis, simulation, place, and route) for the above processes. GDS layouts are not distributed to university users, instead these are instantiated by MOSIS prior to fabrication. See ARM Library Access for Universities for additional information.

Cadence
Process design kits (PDKs), et al., are available via the MOSIS secure document server.


Mentor
Technology files for a variety of tools are available via the MOSIS secure document server.


Synopsys
Technology files for a variety of tools are available via the MOSIS secure document server.



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