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ON Semiconductor Fabrication (formerly AMIS) Technology descriptions, MPW fabrication schedule, and vendor document access procedures for the ON Semiconductor fabrication processes available through MOSIS. ON Semiconductor Fabrication Processes The ON Semiconductor fabrication processes available through MOSIS include 0.7 µm high voltage CMOS, 0.5 µm CMOS, and 0.35 µm high voltage CMOS. ON Semiconductor Fabrication Schedule MOSIS offers a multiproject wafer (MPW) run schedule through ON Semiconductor. To be considered ontime for an MPW run, layout and paperwork are due to MOSIS by 1 PM PT (Pacific/California Time) on the date listed. ON Semiconductor Design Kits ON Semiconductor Design Kits are available upon approval for MOSIS customers. How To Access ON Semiconductor Documents General instructions for accessing ON Semiconductor design rules and cell libraries through MOSIS. International Traffic in Arms Regulations (ITAR) The ON Semiconductor C5 process offered through MOSIS supports designs subject to export control under ITAR regulations. Related Links MOSIS Fabrication Processes

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