SCMOS Design Flow

Projects submitted to MOSIS for fabrication can be designed using either layout design rules and layers specific to a process (vendor native rules) or (for some processes) vendor-independent, scalable rules (SCMOS rules). These rule sets cannot be mixed within a design.

Fabrication Processes

Only some of the processes offered by MOSIS support the SCMOS vendor-independent, scalable layout rules. Select from the processes and technologies that support SCMOS rules and layers.

Design Tools

A variety of CAD tools are available to to create designs for processes that support SCMOS rules.

Kits, Libraries, Cells, Technology Files

A variety of design kits, cell and pad libraries, simulations, and technology files are available to to create designs for processes that support SCMOS rules.

Related Resources

EDA Tools (Union College)

Tale of an IC Design Engineer (SJSU)

Design Resources and Cadence Tutorials (SJSU)

Cadence Tutorial (Worcester Polytechnic Institute)