Technical Support for MEP Accounts
Technical support for MEP accounts available on the MOSIS web site.
SPICE Level 3 Model Parameters
SPICE level 3 model parameters are for classroom instructional purposes, not for actual IC design work.
MEP Process Flow
Process flow for IC fabrication through the MOSIS Educational Program.
EDA Tools for Introductory VLSI Design Courses (Union College)
Industrial tools most often used by academic institutions that fabricate student designs through MOSIS.
Tale of an IC Design Engineer (PDF)
Dr. David Parent of San José State documents the design of an IC, from inception to fabrication.
SJSU IC Design Group (San José State University)
Design resources and Cadence tutorials.
Cadence Design Tools Tutorial (Worcester Polytechnic Institute)
A complete online tutorial for a typical bottom-up design flow using Cadence Custom IC Design Tools.
Technical Point of Contact (TPOC)
Contact your institution's technical point of contact (TPOC) if you cannot find the answer to your question from the MOSIS web site.
MOSIS Educational Program FAQ
Frequently asked questions about the MOSIS Educational Program (MEP).