|
|
austriamicrosystems (AMS)
0.35 Micron
H35B4D3 HV-CMOS Process
1. Process Description
This CMOS process has 4 metal layers and 2 poly layers, a high
resistance layer, plus various options.
Recommended and Absolute Voltages
The recommended voltages, when used, will increase the lifetime of the
devices, as compared to usage at maximum operating voltages.
The absolute maximum voltages, when used, will decrease the lifetime of
the devices.
|
Voltage
|
Recommended
|
Absolute
|
|
Vgs
|
20 V
|
23 V
|
|
Vds
|
50 V
|
55 V
|
|
Vgb
|
20 V
|
23 V
|
|
Vdb
|
50 V
|
55 V
|
|
Vbs
|
50 V
|
55 V
|
2. austriamicrosystems' Design Rules, Process Specifications, and SPICE
Parameters
You can request austriamicrosystems' design rules, process
specifications, and SPICE corner parameters by following the
instructions on the MOSIS web site at
austriamicrosystems Design Rules, Process Specifications, and SPICE
Parameters page.
If you do not have a commercial account with MOSIS, you must create
one. To open a commercial account with MOSIS, complete and send the
Commercial Account
Application along with all appropriate signed agreements. Please
read the instructions carefully before submitting the application
package.
Design rules supported by this technology
Only the austriamicrosystems design rules will be supported for
this technology.
MOSIS Technology Codes
The technology code for the H35B4D3 process is AMS_H35B4D3.
|
Related Links
MOSIS-Supported AMS Processes
AMS Technology
Codes & Layer Maps
AMS
Document Access
|
|
|
