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Taiwan Semiconductor (TSMC)
0.13 Micron
CR013G (CM013G) Process
CR013G (CM013G) MPW Prices
1. CR013G (CM013G) (RF/Mixed-Mode) Process Description
This process is the TSMC nominal 0.13 Cu 1P8M FSG-IMD 1.2/2.5 V
non-RDL process.
This process has 1 poly layer, 8 metals: M1 through M7 thin, and M8
thick, with MD transfer metal under CB passivation. The process is for
1.2 volt applications. A thick oxide layer can be used for 2.5 volt
transistors. Designs for this process require M8 in the pad stack.
Flip chip bumping, ultra-thick topmetal (UTM8), MiM capacitor, and SRAM
support are available. However, for these applications, please
describe your requirements and request more information from
support@mosis.com, as these
options could involve multiple changes to the standard metals stack,
and to MiM capacitor placement in that stack.
The standard RF/mixed-signal process (CR013G) offering includes 1.2/2.5
V nominal (standard) NFET+PFET, 1.2/2.5 V Low-Vt NFET+PFET, 1.2 V
High-Vt NFET+PFET, 1.2/2.5 V Native-Vt NFET, salicide block, varactor
and BJT devices, deep N-well, thick gate oxide (for 2.5 V devices),
high-resistance poly (HRI) resistor, and MiM (capacitor).
MiM capacitors (CTM to CBM, between M7 and M8) provides a capacitance
of 1 fF/µm². An ultra-thick topmetal option (UTM8, for
high-Q inductors) is available by special arrangement. This
RF/mixed-mode process uses non-epitaxial wafers.
2.
TSMC Design Rules, Process Specifications, and SPICE
Parameters
TSMC has sub-licensed MOSIS to distribute this information to approved
customers who have an account with MOSIS and submit the online
TSMC Access
Request form.
Review the following
CMP and antenna guidelines which apply to this process.
Design rules supported by this technology
Only the TSMC design rules will be supported for this technology.
MOSIS Technology Codes
See
Technology
Codes for TSMC CR013G (CM013G) Process.
3. Parametric Test Results and SPICE Model Parameters
Contact support@mosis.com.
4. Reticle/Wafer Size, Steps, Turnaround Time, Die and Wafer Thickness
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TSMC CR013G (CM013G) Process
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Wafer Size
(inches)
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Reticle Size (millimeters, approx.)
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Reticle Copies Stepped on Wafer (approx.)
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Turn- around Time (weeks, approx.)
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Die Thickness
(+/- .5 mil)
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Wafer Thickness
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Mils
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Micro- meters
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Mils
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Micro- meters
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8
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21 x 21 *
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55
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11 - 12
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10
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250
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30
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760
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* Smaller sizes are available.
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Related Links
MOSIS-Supported TSMC Processes
TSMC Technology
Codes & Layer Maps
TSMC Document Access
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