Dalsa
MOSIS and
CMC are collaborating to provide
Dalsa Semiconductor MEMS fabrication capability in a 0.8 µm
High Voltage CMOS/DMOS technology.
MEMSCAP
MOSIS has partnered with CMP in France to access MEMSCAP capability.
Note that this is not an integrated CMOS MEMS process. The MEMS devices
are fabricated on a separate substrate and hybrid assembly methods are
required. MEMSCAP includes the following:
-
PolyMUMPS
A MEMS technology that is composed of three polysilicon layers and one
metal layer on an insulating silicon nitride layer.
-
SOIMUMPS
The technology process uses deep reactive ion etching (RIE) steps on a
Silicon On Insulator (SOI) wafer.
-
MetalMUMPS
The metalMUMPS process is a high aspect ratio, electroplated nickel,
surface micromachining process.
Design kit access and more information about the MEMSCAP processes are available on the CMP
Web site. See the
CMP MEMS Manufacturing Web page and
CMP Procedures for MEMSCAP Design Kit Access.
ON Semiconductor
At the present time, MOSIS can fabricate the basic CMOS MEMS devices in only
ON Semiconductor's C5 process. It is the responsibility of the designer to perform
the MEMS device release etch.
