Products > Fab Processes > austriamicrosystems > AMS 0.18 Micron C18 Process
H18 HV-CMOS Process
austriamicrosystems (AMS) 0.18 Micron
MOSIS is offering access to the austriamicrosystems 0.18 micron CMOS H18 technology for prototype and low volume fabrication. This HV CMOS process process allows the integration of 1.8 V, 5 V, 20 V, and 50 V devices on a single chip.
H18 Supported Options
Standard Options
The options listed below are available on MPW runs without additional cost.- MiM Capacitor: 2.05 fF/µm2
- AM last Metal
- DV Passivation (Wirebond) with Polyimide Coating
Non-Standard Options
The options listed below are not standard. They are available on MPW only by prior arrangement. Please contact MOSIS for availability and cost.- 1.8 V CMOS: Surface Channel High-Threshold Voltage (High-Vt) NFET and PFET
- Thick Ox (12 nm) isolated NFET and PFET with 5.0 V Operations
- Thick Ox (12 nm) isolated and substrate based NFET and PFET with 5.0 V Operations
- Thick Ox (50 nm) isolated NFET and PFET with 20 V Operations
- Thick Ox (12 nm/50 nm) isolated NFET and PFET with 5.0 V/20 V Operations
- Thick Ox (12 nm/50 nm) isolated and substrate based NFET and PFET with 5.0 V/20 V Operations
- Dual MiM Capacitor: 4.10 fF/µm2
- PC Polysilicon (RR) Resistor
- Precision PC Polysilicon (RP) Resistor
- BEOL Metal Level Resistor K1
- ML last Metal
- DV Passivation (Wirebond) without Polyimide Coating
- LV Passivation (C4 Bumping)
Access
Access is restricted to approved customers who have a commercial account with MOSIS. Contact support@mosis.com for design rules, process specifications, and SPICE parameters