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About the MOSIS Educational Program
History of the program, who supplies the funding, and a description of the two types of fabrication grants available under the MOSIS Educational Program.
History and Funding Sources
The MOSIS Service has been conducting an educational program since 1986. Additional details are available in the document, History of the MOSIS Educational Program.
The MOSIS Service does not receive funding from NSF or any other government agency. MOSIS sole source of revenue is derived from its commercial operations.
Types of MEP Accounts
The MOSIS Educational Program (MEP) consists of two divisions: (1) an INSTRUCTIONAL program, and (2) a RESEARCH program.
Projects MOSIS fabricates that are designed by universities and subsidized by other entities are not considered part of the MOSIS Educational Program (MEP).
The MOSIS Instructional program provides free fabrication of integrated circuits designed by students in organized classes associated with an accredited university.
These runs are currently sponsored by MOSIS. ON Semiconductor subsidizes wafer cost for two runs per academic year in the 0.5 µm C5 technology for the exclusive use by MEP participants. During the rest of the year and for GF 7RF, MOSIS includes projects submitted by Instructional accounts to scheduled commercial runs on a space available basis once all commercial requirements have been satisfied.
The MOSIS Research program offers an opportunity to researchers affiliated with a university to fabricate a design that otherwise would not be fabricated.
As stated earlier, MOSIS revenues are derived entirely from commercial operations. Because of the exponential growth in the MEP Research program, MOSIS can no longer be the sole financial support of MEP Research. Since there have been abuses of the initial intent of MEP (support for unfunded research), we must receive written certification that the project has no source of funding when MOSIS is asked to subsidize the entire cost of fabrication.
MOSIS will subsidize the fabrication costs of one chip per university (or per university campus, in the case of state universities with multiple campuses) per year¹, with a chip area not to exceed 16 square millimeters.
This free chip fabrication will require a MEP Research proposal along with a letter from the Dean certifying that the research work is not funded.
Fabrication of this free chip will be provided on a "space available" basis which means that MOSIS can not guarantee fabrication on the schedule selected by the applicant.
The cost of packaging is separate and not included for MEP Research projects. To request some or all of your parts be packaged, send a purchase order in the amount to cover the cost of packaging. See the MOSIS Web site for packaging and assembly guidelines, packaging prices, and purchase order instructions.
University participants requiring fabrication of VLSI devices beyond the above limits may use a university discounted price for fabrication. Be sure to include your MEP account number when you submit your Custom Price Quote Request. Of course, as with a commercial account there are no restrictions on the total area used or the number of projects fabricated.
1 The term year refers to the academic year which starts on October 1 and ends September 30.