Samsung-MOSIS Collaboration

USC Information Sciences Institute’s The MOSIS Service and Samsung Foundry Collaborate to Spur Microelectronics Innovation in the U.S.

The partnership through the University of Southern California (USC) Information Sciences Institute’s (ISI) The MOSIS Service will offer multi-project-wafer runs for the microelectronics community by combining The MOSIS Service integrated circuits manufacturing services with Samsung’s foundry device fabrication technology using the Austin, TX., facility.

USC Viterbi’s Information Sciences Institute and foundry business at Samsung Electronics announced a collaboration today to design and fabricate integrated circuits through USC ISI’s The MOSIS Service using multi-project-wafer runs.

The collaboration combines MOSIS’s industry-leading integrated circuit manufacturing expertise, with Samsung’s high-performance complementary metal-oxide semiconductor (CMOS) and fully-depleted silicon-on-insulator (FD-SOI) fabrication technologies. It positions ISI and Samsung’s advanced technologies to lead a new era of high-performance microelectronic design and manufacturing for the U.S. and global integrated circuits community.

“This is a significant event for the U.S. microelectronic research and development community.” said ISI’ Sr. Director Dr. John Damoulakis. “With this opportunity, the U.S. Government, R&D laboratories, companies, and academia will have access to Samsung’s advanced fabrication technologies economically through MOSIS in the U.S. using S2-Line in Austin, TX. ”

“The Samsung-supported rich ecosystem for both design and fabrication of microelectronic circuits will undoubtedly contribute significantly not only to provide U.S.-based options to the designers, but also to stimulate the microelectronics resurgence and innovation in the U.S.” said Dr. Lifu Chang, The MOSIS Service Director.

ISI’s Executive Director Dr. Craig Knoblock echoed this statement: “There are intense, heavily-funded microelectronic activities throughout the world, and unless the U.S. offers the right ecosystem for integrated circuits design and fabrication to its innovators here in the U.S., there is a real danger that we may fall behind in advanced electronic products that drive a new generation of emerging applications centered on artificial intelligence, machine learning, big data, etc.”

“The collaboration between Samsung and MOSIS ensures that U.S. microelectronic innovators will have at their disposal a rich portfolio of intellectual property modules for integrated circuit designs and many options of advanced fabrication technologies.” said Ryan Lee, Vice President of Foundry Marketing at Samsung Electronics. “That way, their applications can be rapidly and cost effectively materialized, which is essential to foster innovation in the U.S. industrial base.”

About the Technology

The Samsung-MOSIS collaboration involves, for now, the 28nm FD-SOI, eMRAM based on 28nm FD-SOI, 65nm eFlash Bulk CMOS, and 130nm CMOS semiconductor manufacturing processes. For each of these technologies, there are available many application-dependent options, mature process development kits, and comprehensive libraries (offered either by Samsung, or 3rd party vendors) for both “soft” (high-level synthesis) and “physical” (back-end) intellectual property modules that designers can use to realize their integrated circuits.

Whereas 14nm FinFET is a hot topic at the moment, there are other advanced process technologies that designers need, particularly, if the application requires special considerations in the chip design (e.g., ultra-low power). For example, Samsung’s 28nm FD-SOI offers these options. FD-SOI is one of those unique technologies that allows for the continuation of Moore’s Law with an upgrade to traditional planar semiconductor process technology. Samsung’s particular version of FD-SOI delivers a nice balance of higher performance with low power and is well suited for a variety of defense and commercial application areas (RF, mobile, IOT, sensors, automotive, controllers, etc.).

As eFlash has faced scalability challenges due to a charge storage-based operation, Samsung’s eMRAM is the most promising successor, since its resistance-based operation allows strong scalability. The memory also possesses outstanding technical characteristics, such as non-volatility, random access, and strong endurance. The combination of Samsung’s 28nm FD-SOI with eMRAM offers solutions of unprecedented power and speed advantages with lower cost and better transistor control and leakage minimization. Overall, Samsung’s eMRAM solutions provide differentiated benefits for a variety of applications including microcontroller units, internet of things, artificial intelligence, sensors, etc.; it can be easily integrated into the design of chips using existing design flows.

About USC Viterbi School of Engineering

Engineering Studies began at the University of Southern California in 1905. Nearly a century later, in 2004, the Viterbi School of Engineering received a naming gift from alumnus Andrew J. Viterbi, inventor of the Viterbi algorithm, now the key to cell phone technology and numerous data applications.

The school’s guiding principle is Engineering-plus, a coined termed by current Dean Yannis C. Yortsos, to use the power of engineering to address the world’s greatest challenges. USC Viterbi is ranked among the top engineering programs in the world and enrolls more than 6,500 undergraduate and graduate students taught by 185 tenured and tenure-track faculty, with 73 endowed chairs and professorships.

The USC Viterbi School of Engineering offers executive and continuing education programs, designed for non-degree seeking professionals. Program participants can take advantage of the flexibility and interactivity offered by the Viterbi School, by taking continuing education courses on USC's campus, completely online via DEN@Viterbi or on-site at an organization’s location. http://viterbi.usc.edu/